Hardware-in-the-Loop and Digital Control Techniques Applied to Single-Phase PFC Converters
Autor:
Lamo-Anuarbe, Paula
; de Castro, Ángel
; Sanchez, Alberto
; Ruiz, Gustavo A.
; Azcondo, Francisco J.
; Pigazo, Alberto
Fecha:
2021Palabra clave:
Revista / editorial:
ElectronicsCitación:
Lamo, P.; de Castro, A.; Sanchez, A.; Ruiz, G.A.; Azcondo, F.J.; Pigazo, A. Hardware-in-the-Loop and Digital Control Techniques Applied to Single-Phase PFC Converters. Electronics 2021, 10, 1563. https://doi.org/10.3390/electronics10131563Tipo de Ítem:
articleDirección web:
https://www.mdpi.com/2079-9292/10/13/1563Resumen:
Power electronic converters for power factor correction (PFC) play a key role in single-phase electrical power systems, ensuring that the line current waveform complies with the applicable standards and grid codes while regulating the DC voltage. Its verification implies significant complexity and cost, since it requires long simulations to verify its behavior, for around hundreds of milliseconds. The development and test of the controller include nominal, abnormal and fault conditions in which the equipment could be damaged. Hardware-in-the-loop (HIL) is a cost-effective technique that allows the power converter to be replaced by a real-time simulation model, avoiding building prototypes in the early stages for the development and validation of the controller. However, the performance-vs-cost trade-off associated with HIL techniques depends on the mathematical models used for replicating the power converter, the load and the electrical grid, as well as the hardware platform chosen to build it, e.g., microprocessor or FPGA, and the required number of channels and I/O types to test the system. This work reviews state-of-the-art HIL techniques and digital control techniques for single-phase PFC converters.
Ficheros en el ítem
Nombre: Hardware_in_the_Loop_and_Digital_Control_Techniques.pdf
Tamaño: 1.523Mb
Formato: application/pdf
Este ítem aparece en la(s) siguiente(s) colección(es)
Estadísticas de uso
Año |
2012 |
2013 |
2014 |
2015 |
2016 |
2017 |
2018 |
2019 |
2020 |
2021 |
2022 |
2023 |
2024 |
Vistas |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
57 |
66 |
66 |
Descargas |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
5 |
151 |
Ítems relacionados
Mostrando ítems relacionados por Título, autor o materia.
-
Implementation Oriented Two-Sample Phase Locked Loop for Single-Phase PFCs
Lamo-Anuarbe, Paula ; Ruiz, Gustavo A.; Azcondo, Francisco J.; Pigazo-López, Alberto (2020 IEEE 21st Workshop on Control and Modeling for Power Electronics, 2020)A low-resource-consuming digital implementation of the Two-Sample (2S) Phase Locked Loop (PLL)for application in low cost single-phase Power Factor Correction (PFC) converters is proposed. The design reduces the sampling ... -
Soluciones anti-isla en baja y media tensión
Lamo-Anuarbe, Paula; Ruiz-Robredo, Gustavo; Mañana-Canteli, Mario; Azcondo, Francisco J.; Pigazo-López, Alberto (DYNA. Ingeniería e Industria, 11/2020)Este trabajo presenta las soluciones más representativas empleadas en la detección de islas eléctricas no intencionales en redes eléctricas de distribución. Además, analiza la adopción de estos métodos por parte de los ... -
Open AccessArticle Impact of the Noise on the Emulated Grid Voltage Signal in Hardware-in-the-Loop Used in Power Converters
Lamo-Anuarbe, Paula; Ruiz, Gustavo A.; Azcondo, Francisco J.; Pigazo, Alberto; Brañas, Christian (Electronics (Switzerland), 2023)This work evaluates the impact of the input voltage noise on a Hardware-In-the-Loop (HIL) system used in the emulation of power converters. A poor signal-to-noise ratio (SNR) can compromise the accuracy and precision of ...